1/10 september 2003 n meets or exceeds the requirements of ansi tia/eia-644 standard n operates with a single 3.3v supply n designed for signaling rate up to 400mbps n differential input thresholds 100mv max n typical propagation delay time of 2.5ns n power dissipation 60mw typical per receiver at 200mhz n low volatge ttl (lvttl) logic output levels n open circuit fail safe n esd protection: 7kv receiver pins 3kv all pins vs gnd description the stlvds9637, is a differential line receiver that implements the electrical characteristics of low voltage differential signaling (lvds). this signaling technique lowers the output voltage levels of 5v differential standard levels (such as tia/eia-422b) to reduce the power, increase the switching speeds and allow operations with a 3.3v supply rail. this differential receiver provides a valid logical output state with a 3.3v supply rail. it also provides a valid logical output state with a 100mv differential input voltage within the input common mode voltage range. the input common mode voltage allows 1v of ground potential difference between two lvds nodes. the intended application of this device and signalling technique is both point-to-point and multidrop data transmission over controlled impedance media approximately 100 w .the transmission media may be printed circuit board traces, backplanes or cables. the ultimate rate and distance of data transfer depend upon the attenuation characteristics of the media and noise coupling to the environment. the stlvds9637 version is characterized for operation from -40c to 85c. ordering codes typ e temperature range package comments STLVDS9637Bd -40 to 85 c so-8 (tube) 100parts per tube / 40tube per box STLVDS9637Bdr -40 to 85 c so-8 (tape & reel) 2500 parts per reel stlvds9637 high speed differential line receivers sop
stlvds9637 2/10 pin configuration pin description logic diagram and logic symbol truth table l = low level, h = high level, x = dont care, z = high impedance, ? = indeterminate pln n symbol name and function 2, 3 1y to 2y receiver outputs 5, 7 1b to 2b negated receiver inputs 6, 8 1a to 2a receiver inputs 4 gnd ground 1 v cc supply voltage differential inputs output a, b y v id 3 100mv h -100mv < v id < 100mv ? v id -100mv l open h
stlvds9637 3/10 absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these condition is not implied. note 1: all voltages except differential i/o bus voltage, are with respect to the network ground terminal. recommended operating conditions electrical characteristics (over recommended operating conditions unless otherwise noted. all typical values are at t a = 25c, and v cc =3.3v) symbol parameter value unit v cc supply voltage (note 1) -0.5 to 4.6 v v i input voltage -0.5 to (v cc + 0.5) v v i input voltage (a or b inputs) -0.5 to 4.6 v esd human body model pins receivers 7 kv all pins vs gnd 3 t stg storage temperature range -65 to +150 c symbol parameter min. typ. max. unit v cc supply voltage 3.0 3.3 3.6 v v ih high level input voltage (enable) 2.0 v v il low level input voltage (enable) 0.8 v |v id | magnitude of differential input voltage 0.1 0.6 v v ic common mode input voltage 0.5|v id | 2.4-0.5|v id |v v cc - 0.8 t a operating temperature range -40 85 c symbol parameter test conditions min. typ. max. unit v ith+ positive going differential input voltage threshold 100 mv v ith- negative going differential input voltage threshold -100 mv v oh high level output voltage i oh = -8ma 2.4 v i oh = -4ma 2.8 v ol low level output voltage i oh = 8ma 0.4 v i cc supply current no load 4 10 ma i i input current (a or b inputs) v i = 0v -2 -10 -20 m a v i = 2.4v -1.2 -3 i i(off) power off input current (a or b inputs) v cc =0 v i = 3.6v 10 20 m a i ih high level input current (en, g, g or inputs) v ih =2v 10 m a i il low level input current (en, g, g or inputs) v il = 0.8v 10 m a i oz high impedance output current v o = 0 or v cc 10 m a
stlvds9637 4/10 switching characteristics (unless otherwise noted. typical values are referred to t a =25c and v cc =3.3v) note 1: t sk(o) is the maximum delay time difference between the propagation delay of one channel and that of the others on the same chip with any event on the inputs. note 2: t sk(p) is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. note 3: t sk(pp) is the differential channel-to-channel skew of any event between devices. this specification applies to devices at the same v cc , and within 5c of each other within the operating temperature range. symbol parameter test conditions min. typ. max. unit t plh propagation delay time, low to high output c l = 10pf fig. 1 1.5 2.5 3.3 ns t phl propagation delay time, high to low output 1.5 2.5 3.3 ns t r differential output signal rise time 0.4 ns t f differential output signal fall time 0.4 ns t sk(o) channel to channel output skew (note1) 0.1 0.3 ns t sk(p) pulse skew (|t phl -t plh |) (note2) 0.2 0.4 ns t sk(pp) part to part skew (note3) 1 ns t pzh propagation delay time, high impedance to high level output fig. 2 3 12 ns t pzl propagation delay time, high impedance to low level output 512ns t phz propagation delay time, high level to high impedance output 512ns t plz propagation delay time, low level to high impedance output 512ns
stlvds9637 5/10 figure 1 : timing test circuit, timing and waveforms note a: all input pulse are supplied by a generator having the following characteristics: t r or t f 1ns, pulse repetition rate (prr) = 50mpps, pulse width = 10 0.2ns. note b: c l includes instrumentation and fixture capacitance within 6mm of the d.u.t.
stlvds9637 6/10 figure 2 : enable and disable time test circuit and waveform note a: all input pulse are supplied by a generator having the following characteristics: t r or t f 1ns, pulse repetition rate (prr) = 50mpps, pulse width = 500 10ns. note b: c l includes instrumentation and fixture capacitance within 6mm of the d.u.t.
stlvds9637 7/10 typical performance characteristics (unless otherwise specified t j =25c) figure 3 : output current vs output voltage figure 4 : output current vs output voltage
stlvds9637 8/10 dim. mm. inch min. typ max. min. typ. max. a 1.35 1.75 0.053 0.069 a1 0.10 0.25 0.04 0.010 a2 1.10 1.65 0.043 0.065 b 0.33 0.51 0.013 0.020 c 0.19 0.25 0.007 0.010 d 4.80 5.00 0.189 0.197 e 3.80 4.00 0.150 0.157 e 1.27 0.050 h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 l 0.40 1.27 0.016 0.050 k ? (max.) ddd 0.1 0.04 so-8 mechanical data 0016023/c 8
stlvds9637 9/10 dim. mm. inch min. typ max. min. typ. max. a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t 22.4 0.882 ao 8.1 8.5 0.319 0.335 bo 5.5 5.9 0.216 0.232 ko 2.1 2.3 0.082 0.090 po 3.9 4.1 0.153 0.161 p 7.9 8.1 0.311 0.319 tape & reel so-8 mechanical data
stlvds9637 10/10 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2003 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com
|
